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1 IRDC3629A user guide for ir3629a evaluation board (v in =12v, v o =1.8v, i o =25a) description the ir3629a is a synchronous buck controller, providing a compact, high performance and flexible solution in a small 3mmx4mm mlpd package. key features offered by the ir3629a include programmable soft-start ramp, precision 0.6v reference voltage, thermal protection, fixed 300khz switching frequency requiring no external component, input under-voltage lockout for proper start-up, and pre-bias start- up. an output over-current protection function is implemented by sensing the voltage developed across the on-resistance of the synchronous rectifier mosfet for optimum cost and performance. this user guide contains the schematic and bill of materials for the ir3629a evaluation board. the guide describes operation and use of the evaluation board itself. detailed application information for the ir3629a integrated circuit is available in the ir3629a data sheet. board features v in = +12v (13.2v max) v out = +1.8v @ 0-25a irf6712 as controller mosfet irf6715 as synchronous mosfet l = 0.6uh c in =2x270uf (os-con cap) + 2x10uf (ceramic 1206) c out =2x330uf(sp cap) optional external supply connection for vc optional power-good output connection downloaded from: http:///
2 IRDC3629A a well regulated +12v input supply should be connected to vin+ and vin-. a maximum of 20a load can be connected to vout+ and vout-. the connection diagram is shown in fig. 1 ir3629a demo board can also be powered by two separate power supplies, one is the input voltage (vin) between vin+ and vin-, the other is bias voltage (vcc) between vc-ext and pgnd. in this case, a well regulated 5v~12v power supply should be connected to vc-ext and pgnd and r14 should be removed. inputs and outputs of the board are listed in table i. table i. connections optional vcc input vc-ext ground for optional vcc input pgnd bias voltage ground gnd v out (+1.8v) vout+ ground of v out vout- ground of v in vin- v in (+12v) vin+ signal name connection connections and operating instructions layout the pcb is a 6-layer board. all of layers are 2 oz. copper. power supply decoupling capacitors, the charge- pump capacitor and feedback components are located close to the ir3629a. the feedback resistors are connected to the output voltage at the point of regulation and are located close to the ic. the input and output energy storage capacitors and the power inductor are located on bottom side of the board, to improve efficiency, the circuit board is designed to minimize the length of the on-board power ground current path. downloaded from: http:///
3 IRDC3629A fig. 1 connection diagram of the evaluation board for ir3629a (top view) ir3629a demo board v o =1.8v v in = 12v fig. 2 bottom view of the evaluation board for ir3629a downloaded from: http:///
4 IRDC3629A ir3629a pcb layers top layer bottom layer downloaded from: http:///
5 IRDC3629A mid-layer1 mid-layer2 ir3629a pcb layers pgnd agnd single point connection between pgnd and agnd downloaded from: http:///
6 IRDC3629A mid-layer3 mid-layer4 ir3629a pcb layers downloaded from: http:///
7 IRDC3629A fig. 3 schematic of the ir3629a evaluation board with 12vin and1.8v output voltage ir3629a demo board schematic vout- 1 q1 irf6712 sq 2 5 4 1 3 6 7 vin pgnd 1 pgnd 1 c10 0.1uf n3065372 c2 10uf c3 10uf c4 0.1uf c120.1uf l1 0.6uh 1 2 c140.1uf sw 1 n3065200 c24 no stuff c23 0.1uf d1 bat54s 1 2 3 c26 1nf vout vc-ext 1 r9 0 r1 26.7k r10 no stuff r315.8k r4 3.57k r2 31.6k c20330uf r620 c16no stuff c250.1uf u1 ir3629a vcc 2 ss/sd 11 gnd 10 pgood 1 vsens 7 fb 8 comp 9 vc 6 hdrv 5 ocset 12 ldrv 3 pgnd 4 thermal 13 r* 0 c17no stuff r12 3.65k c21 330uf c9n/a c18no stuff c19no stuff c15no stuff r5 3.09k r7 10k a 1 b 1 + c1 270uf q2irf6715 mx 2 5 4 1 3 6 7 c8 0.56nf r15n/a en 1 vin+ 1 c22 1uf vin- 1 vout+ 1 c5 10uf vout vout- 1 r17 4.99k c6 10uf n3064730 c11 39pf pgood 1 agnd 1 vin+ 1 vin- 1 r14 68 vout+ 1 downloaded from: http:///
8 IRDC3629A bill of materials any any 1206 thick film, 1%, 1/4w 68 r14 1 23 any any 603 thick film, 1%, 1/10w 4.99k r17 1 22 any any 603 thick film, 1%, 1/10w 3.65k r12 1 21 any any 603 thick film, 1%, 1/10w 20 r6 1 20 any any 603 thick film, 1%, 1/10w 3.09k r5 1 19 any any 603 thick film, 1%, 1/10w 3.57k r4 1 18 any any 603 thick film, 1%, 1/10w 15.8k r3 1 17 any any 603 thick film, 1%, 1/10w 10k r7 1 16 any any 603 thick film, 1%, 1/10w 31.6k r2 1 15 any any 603 thick film, 1%, 1/10w 26.7k r1 1 14 any any 603 thick film, 1%, 1/10w 0 r9 1 13 irf6715mpbf ir directfet mx nfet, 25v, 1.3mohm, 40nc irf6715 mx q2 1 12 irf6712spbf ir directfet sq nfet, 25v, 3.8mohm, 12nc irf6712 sq q1 1 11 mpl104-0r6 delta - 1.5mohm 0.6uh l1 1 10 bat54s vishay sot-23 dual schottky diode bat54s d1 1 9 ecj1vb1h102k panasonic 603 ceramic, 50v, x7r, 10% 1000pf c26 1 8 c1608x5r1c105k tdk 603 ceramic, 16v, x5r, 10% 1uf c22 1 7 eefsx0d331xe panasonic - sp-cap, 2v, 6mohm 330uf c20,c21 2 6 grm1885c1h390ja01d murata 603 ceramic, 50v, c0g, 5% 39pf c11 1 5 grm1885c1h561ja01d murata 603 ceramic, 50v, c0g, 5% 560pf c8 1 4 c1608x7r1h104k tdk 603 ceramic, 25v, x7r, 10% 0.1uf c4,c10,c12 c14,c23,c2 5 6 3 grm31cr61c106ka88 murata 1206 ceramic, 25v, x7r, 10% 10uf c2,c3, c5,c6 4 2 16svpc270m sanyo - os-con cap, 16v, 20% 270uf c1 1 1 part number manufacturer size description value reference quantity item downloaded from: http:///
9 IRDC3629A bill of materials (cont.) part number manufacturer size description value reference quantity item 105-0854-001 johnson components - banana jack, insulated, solder terminal, green - - 1 30 105-0852-001 johnson components - banana jack, insulated, solder terminal, red - - 1 29 105-0853-001 johnson components - banana jack, insulated, solder terminal, black - - 2 28 603 no stuff r10, r15 2 27 1206 no stuff c15,c16,c1 7,c18,c19 6 26 603 no stuff c9, c24 2 25 ir3629ampbf ir mlpd 3x4 pwm controller ir3629a u1 1 24 downloaded from: http:///
10 IRDC3629A tracking operating performance vin=12.0v, vo=1.8v, fs=300khz, room temperature, no air flow fig. 4 start up at 25a ch1:pgood, ch2:vss, ch3:vin, ch4:vout fig. 5 prebias start up ch1:vin, ch2:vout, ch3:vss fig. 6 output voltage ripple at 25a load ch1:vout, ch3:sw fig. 7 gate signals at 25a load ch1:sw, ch2:hdrv, ch3:ldrv fig. 8 transient response ch1:vout, ch4:io(0-12.5a) fig. 9 shorted hiccup condition recovery ch2:vout, ch3:vss, ch4:io downloaded from: http:///
11 IRDC3629A typical operating performance vin=12.0v, vo=1.8v, io=0-25a, fs=300khz, air flow=200lfm fig. 10 bode plot of control loop downloaded from: http:///
12 IRDC3629A typical operating performance vin=12.0v, vo=1.8v, fs=300khz, room temp, no air flow fig. 11 efficiency vs. load fig. 12 thermal image of ir3629a demo board at io=20a (1: ir3629a, 2: irf6715, 3: irf6712) ir3629a efficiency 40 50 60 70 80 90 100 0.0 2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 iout(a) efficiency(%) 2 1 downloaded from: http:///
13 IRDC3629A pcb metal and components placement ? the lead land width should be equal to the nominal part l ead width. the minimum lead to lead spacing should be 0.2mm to minimize shorting. ? the lead land length should be equal to maximum pa rt lead length + 0.3 mm outboard extension + 0.05mm inboard extension. the outboard extension ensures a larg e and inspectable toe fillet, and the inboard extension will accommodate any part misalignment and ensure a fillet. ? the center pad land length and width should be equal to maximum part pad length and width. however, the minimum metal to metal spacing should be 0.17mm for 2 oz. copper ( 0.1mm for 1 oz. copper and 0.23mm for 3 oz. copper). ? two 0.30mm diameter via should be placed in the center of the pad land and connected to ground to minimize the noise effect on the ic. 13 downloaded from: http:///
14 IRDC3629A solder resist ? the solder resist should be pulled away from the metal lead lands by a minimum of 0.06mm. the solder resist mis- alignment is a maximum of 0.05mm and it is recommended th at the lead lands are all non solder mask defined (nsmd). therefore pulling the s/r 0.06mm will always ensure nsmd pads. ? the minimum solder resist width is 0.13mm. at the inside corner of the solder resi st where the lead land groups meet, it is recommended to provide a fillet so a solder resist width of 0.17mm remains. ? the land pad should be non solder mask defined (nsmd), with a minimum pullback of the solder resist off the copper of 0.06mm to accommodate solder resist mis-alignment. ? ensure that the solder resist in-between the lead lands and the pad land is 0.15mm due to the high aspect ratio of the solder resist strip separating the lead lands from the pad land. ? each via in the land pad should be tented or plugged from bottom boardside with solder resist. 14 downloaded from: http:///
15 IRDC3629A stencil design ? the stencil apertures for the lead lands should be approximately 80% of the area of the lead lands. reducing the amount of solder deposited will minimize the occurrence of lead shorts. since for 0.5mm pitch devices the leads are only 0.25mm wide, the stencil apertures should not be made narrower; openings in stencils < 0.25mm wide are difficult to maintain repeatable solder release. ? the stencil lead land apertures should therefore be shortened in length by 80% and centered on the lead land. ? the land pad aperture should deposit approximately 50% area of solder on the center pad. if too much solder is deposited on the center pad the part w ill float and the lead lands will be open. ? the maximum length and width of the land pad stencil aperture should be equal to the solder resist opening minus an annular 0.2mm pull back to decrease the incidence of shor ting the center land to the lead lands when the part is pushed into the solder paste. 15 downloaded from: http:///
16 IRDC3629A ir3629a mlpd package 3x4-12lead seating plane leads on 2 sides d e e/2 d2 e2 a (nd-1) x e e l a1 a3 b e d e2 d2 l a a1 m o b s y b a3 l nd n nom inches .008 ref .157 bsc .118 bsc .016 .055 _ min .000 millimeters nom min max .035 .032 .0008 vged-4 0.80 0.90 1.00 0.00 0.02 0.05 1.40 _ 1.80 .0071 0.30 .0096 0.18 0.25 0.20 ref 3.70 3.0 _ .118 4.00 bsc 3.00 bsc 0.40 0.30 0.50 .012 0.50 pitch 6 12 .070 .039 .0019 max .0118 .145 .019 10 .020 pitch 6 e _ terminal 1 identifier tape & reel orientation figure a ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 this product has been designed and qualified for the industrial market. visit us at www.irf.com for sales contact information data and specifications subject to change without notice. 02/01 downloaded from: http:///

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